Memory is one type of integrated circuitry, and is used in computer systems for storing data. An example memory is DRAM (dynamic random-access memory). DRAM cells may each comprise a transistor in combination with a capacitor. The DRAM cells may be arranged in an array; with wordlines extending along rows of the array, and digit lines extending along columns of the array. The wordlines may be coupled with the transistors of the memory cells. Each memory cell may be uniquely addressed through a combination of one of the wordlines with one of the digit lines.
Some DRAM may have the digit lines coupled to portions of active regions, and may have the capacitors coupled with interconnects which extend to other portions of the active regions. The interconnects may be proximate to the digit lines, and parasitic capacitance may problematically occur between the interconnects and the digit lines. It would be desirable to develop architectures which alleviate, or even entirely prevent, such parasitic capacitance; and to develop methods of forming such architectures.
A strategy for alleviating parasitic capacitance is to utilize low-k regions between neighboring conductive components. A particularly-desirable low-k region is a void region. However, it may be problematic to adequately seal void regions. Accordingly, it would be desirable to develop methods suitable for sealing void regions. It would be desirable for such methods to be applicable across a broad spectrum of integrated applications, including, but not limited to, solutions which alleviate or prevent the problem described above relative to the parasitic capacitance between interconnects and digit lines.